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杜刚

职称:教授

研究所:微纳电子学研究院

研究领域:半导体器件模型、模拟及参数提取

办公电话:86-10-6275 5233

电子邮件:gangdu@pku.edu.cn

个人主页:

科研/教育经历

       1975年出生于四川,1998年和2003年在北京大学先后获得理学学士和理学博士学位。2003年进入北京大学信息学院做博士后研究,2005年任副教授,2012年任教授。


主要研究方向

       主要研究领域为半导体器件模型、模拟及参数提取。


研究成果概况

       在纳米尺度器件模拟方法研究方向,针对不同工作机理器件研究的需要,建立了系列器件模拟工具;(2)针对量子效应影响下的非稳态输运问题,提出了一种求解波尔兹曼方程的MC模拟方法,建立了Ge、Si、GaAs等材料的三维全能带MC器件模拟平台,满足了22nm及以下技术节点器件特性研究的需求;针对新型存储器件研究的需要,建立了电荷俘获存储器(CTM)模拟器,弥补了商用TCAD软件在新型存储器件特性模拟方面的不足。目前研究方向:

1. 纳米尺度集成电路自热效应及可靠性研究:从器件到电路的自热效应影响TCAD模拟和实验表征分析评估及建模。

2. 3DNAND 存储阵列器件及电路可靠性:从器件可靠性仿真到阵列电路的失效率分析模拟,利用TCAD工具对存储阵列工作模式进行优化。

3. 纳米新器件中的输运现象:利用课题组已有的多层次器件模拟工具,评估和优化设计新结构、新材料器件,建立准弹道特征的输运模型及器件模型。

       作为骨干人员先后参加多项国家973子项目、863项目、国家自然科学基金项目,负责一项国家自然科学基金科研项目。在器件模型模拟领域取得了大量创新成果,在国内外期刊和国际会议上发表论文200余篇。


Selected Publications

1.         Du, Gang; Liu, Xiaoyan; Xia, Zhiliang; Kang, Jinfeng; Wang, Yi; Han, Ruqi; Yu, HongYu; Kwong, Dim-Lee. Monte Carlo simulation of p- and n-channel GOI MOSFETs by solving the quantum boltzmann equation. IEEE Transactions on Electron Devices, v 52, n 10, October, 2005,  p 2258-2263

2.         Du, Gang; Liu, Xiao Yan; Xia, Zhi Liang; Wang, Ya Ke; Hou, Dan Qiong; Kang, Jin Feng; Han, Ru Qi. Evaluations of scaling properties for Ge on insulator MOSFETs in nano-scale Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, v 44, n 4 B, April, 2005, Solid State Devices and Materials,  p 2195-2197

3.         Du, Gang; Liu, Xiao-Yan; Han, Ru-Qi. Quantum Boltzmann equation solved by Monte Carlo method for nano-scale semiconductor devices simulation Chinese Physics, v 15, n 1, Jan 1, 2006,  p177-181

4.         Du Gang, Liu Xiaoyan, Xia Zhiliang, Yang Jingfeng and Han Ruqi. Effect of Interface Roughness on the Carrier Transport in Germanium MOSFETs Investigated by Monte Carlo Method. Chinese Physics B, v 19, n 5, p 0573041-0573046, 2010.

5.         Du Gang; Liu XiaoYan; Han RuQi.  High Frequency Performance of Nano-ScaleUltra-Thin-Body Schottky-Barrier n- MOSFETs. Science China-Information Scienses v 54, n 8, p 1756-1761.  AUG 2011

6.         Chang, Pengying; Liu, Xiaoyan; Zeng, Lang; Wei, Kangliang; Du, Gang. Investigation of Hole Mobility in Strained InSb Ultrathin Body pMOSFETs IEEE TRANSACTIONS ON ELECTRON DEVICES  v 62,n 3,p 947-954, MAR 2015

7.         Hai Jiang;   Longxiang Yin;   Yun Li;   Nuo Xu;   Kai Zhao;   Yandong He;   Gang Du;   Xiaoyan Liu;   Xing Zhang. Comprehensive understanding of hot carrier degradation in multiple-fin SOI FinFETs. Reliability Physics Symposium (IRPS), 2015

8.         Pengying Chang, Xiaoyan Liu, Gang Du, Xing Zhang. Assessment of Hole Mobility in Strained InSb, GaSb and InGaSb Based Ultra-Thin Body pMOSFETs with Different Surface Orientations IEDM 2014

9.         Huang, Peng; Wang, Yijiao; Li, Haitong; Gao, Bin; Chen, Bing; Zhang, Feifei; Zeng, Lang; Du, Gang; Kang, Jinfeng; Liu, Xiaoyan. Analysis of the Voltage-Time Dilemma of Metal Oxide-Based RRAM and Solution Exploration of High Speed and Low Voltage AC Switching IEEE TRANSACTIONS ON NANOTECHNOLOGY  v 13,n 6, p 1127-1132, NOV 2014

10.     Wang, Juncheng; Du, Gang; Wei, Kangliang; Zhao, Kai; Zeng, Lang; Zhang, Xing; Liu, Xiaoyan. Mixed-mode analysis of different mode silicon nanowire transistors-based inverter. IEEE Transactions on Nanotechnology, v 13, n 2, p 362-367, March 2014

11.     Liu, Gai; Du, Gang; Lu, Tiao; Liu, Xiaoyan; Zhang, Pingwen; Zhang, Xing. Simulation study of quasi-ballistic transport in asymmetric DG-MOSFET by directly solving Boltzmann transport equation. IEEE Transactions on Nanotechnology,  v 12, n 2, p 168-173,  2013

12.     Wang, Jun-Cheng; Du, Gang;  Wei, Kang-Liang; Zhang, Xing; Liu, Xiao-Yan. Three-dimensional Monte Carlo simulation of bulk fin field effect transistor. Chinese Physics B,  v 21, n 11,  November 2012

13.     Wu, Wei; Du, Gang; Liu, Xiaoyan; Sun, Lei; Kang, Jinfeng; Han, Ruqi. Physical-based threshold voltage and mobility models including shallow trench isolation stress effect on nMOSFETs. IEEE Transactions on Nanotechnology, v 10, n 4, p 875-880, July 2011

14. Zhu, Shufang; Wei, Kangliang; Du, Gang; Liu, Xiaoyan. 3D Monte Carlo simulation of gate-all-around germanium nmosfet with effective potential quantum correction. Journal of Circuits, Systems and Computers, v 22, n 10, December 2013

15.    Lun, Zhiyuan; Du, Gang; Zhao, Kai;Xiao-Yan Liu, Yi Wang. A two-dimensional simulation method for investigating charge transport behavior in 3-D charge trapping memory.  SCIENCE CHINA-INFORMATION SCIENCES  vol.59,no.12, DEC 2016

16.    Zhi-Yuan Lun, Yun Li, Kai Zhao, Gang Du, Xiao-Yan Liu, Yi Wang. Modeling of trap-assisted tunneling on performance of charge trapping memory with consideration of trap position and energy level. Chinese Physics B, Vol. 25, No. 8, 2016.